TSMC Accelerates CoPoS Development; Taiwan Panel Makers and Local Materials and Equipment Suppliers Leverage FOPLP for Glass Core Substrate Opportunity, Says TrendForce

The rapid growth of demand for AI semiconductors is driving the evolution of advanced packaging technologies, with Fan-Out Panel-Level Packaging (FOPLP) emerging as a new battleground across the industry. TrendForce reports that TSMC is currently focusing on its Chip-on-Panel-on-Substrate (CoPoS) packaging architecture and has standardized on a 310 × 310 mm panel format.